void Stm32_Clock_Init_to_72M_way2(void){，下面我们就来说一说关于stm32常用小功能?我们一起去了解并探讨一下这个问题吧!
stm32常用小功能
void Stm32_Clock_Init_to_72M_way2(void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001; //内部高速时钟开启
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
RCC->CFGR &= (uint32_t)0xF8FF0000; //清除相关位为0，为时钟配置做准备
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;//HSE时钟关闭,关闭时钟CSS检测,关闭PLL
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;//外部时钟HSE为没有旁路
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= (uint32_t)0xFF80FFFF;//复位 PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE 为0
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000; //关闭时钟所有中断和清除标志位
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);//开启HSE振荡器
/* Wait till HSE is ready and if Time out is reached exit */
//等待外部振荡器准备就绪，有等待时间设定
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter ;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;//外部时钟准备就绪
}
else
{
HSEStatus = (uint32_t)0x00;
}
//外部时钟已准备就绪
if (HSEStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer */
/* 启用预取缓冲区*/
FLASH->ACR |= FLASH_ACR_PRFTBE;
/* Flash 2 wait state 相关配置位先清0 */
FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
/* 两个等待状态周期 */
FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;//7:4 HPRE[3:0]配置AHB的SYSCLK是否分频,不分频//
/* PCLK2 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; //13：11设置高速时钟APB预分频APB2,不分频//
/* PCLK1 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; //10：8设置APB1的时钟HCLK的2分频//
/* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
/* HSE时钟作为PLL输入时钟,HSE的不分频，分频系数配置，清相关位为0，如下 /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
/* HSE时钟作为PLL输入时钟,HSE的不分频，分频系数配置，清相关位为0，如下是取反 */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
/* HSE时钟作为PLL输入时钟,HSE的不分频，分频系数配置为9 */
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
/* Enable PLL 使能PLL时钟*/
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready 判断PLL时钟是否准备好，直到锁定*/
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Select PLL as system clock source 先清除相关位为0，再设置相关位为1 */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
/* 设置HSE作为系统时钟*/
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
/* Wait till PLL is used as system clock source */
/* 由状态位,判断HSE是否已切换系统时钟，不然一直在等待 */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}
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