-1-存储程序和自动执行程序是冯诺依曼计算机工作的基本原理
50年代冯诺依曼提出了五大部件和存储程序概念，计算机由输入设备、存储器、控制器、运算器、输出设备组成，指令和数据可一起放在存储器，程序按顺序自动执行。
CPU由运算器、控制器和寄存器及实现它们之间联系的数据、控制及状态的总线构成。差不多所有的CPU的运作原理可分为四个阶段：提取（Fetch）、解码（Decode）、执行（Execute）和写回（Writeback）。 CPU从存储器或高速缓冲存储器中取出指令，放入指令寄存器，并对指令译码，并执行指令。所谓的计算机的可编程性主要是指对CPU的编程。
所谓指令是一串二进制数，它规定机器做什么操作。指令分为两部分：操作码和操作数。操作码说明要做什么操作，操作数指明要处理的数据的存放地址在什么地方。处理器里有百儿八十条指令，称为指令集；机器语言可以被看作一种约定的形式，用处理器和寄存器来操控内存。
A register is a storage location inside the processor.Rigisters in the control unit are used to keep track of the overall status of the program that is running.Control unit registers store information such as the current instruction,the location of the next instruction to be executed,and the operands of the instruction.In the ALU,registers store data items that are added,substracted,multiplied,divided,and compared.Other registers store the results of arithmetic and logical operations.
-5- 总线：五大部件的连接
为了读出程序、处理数据等，必须要在CPU与内存之间进行数据的传送。数据是利用称为数据总线（data bus）的传输途径进行交换的。所谓总线(bus)，就是计算机主板上的某种传输线路。总线的宽度（即传输线的条数），会因CPU而各异。比如，对于32位总线而言，每次可以交换32位的数据。但需要注意的是，总线位数并不是CPU的位数，而是指传输数据时的位数。例如，英特尔公司的奔腾系列为32位的CPU，其数据总线的宽度为64位。总线是与从CPU芯片里面引出来的，一根一根针（pin）脚相对应的。如果能对照CPU芯片或计算机主板的实物，找到称为总线的传输线路，对总线的概念，就会有感觉了。
此外，为了从内在读出数据，或者将数据写入内存，就必须要指定读出的位置和写入的位置。因此，内存中的每个字节（Byte）都被分配了相应的编号（当然不一定都要以字节为单位，也有采用别的单位进行编号的），这种编号就称为地址（address）。当要访问内存时，就需要从CPU传送出指定地址的电信号。这种信号也是通过总线进行传送的，但它与传送数据所用的总线（数据总线）不同，是由地址总线的位数所决定的。
比如，若地址总线只有16条（即16位总线），其所能存取访问的地址是，从0000 0000 0000 0000地址到1111 1111 1111 1111地址为止，只有65636个单元。现在市场上的奔腾系列CPU，其地址总线有32根。它可以直接访问的内在单元为232＝4GB（约40亿个字节）。
主存与CPU的硬连接有三组连线：地址总线（AB）、数据总线（DB）和控制总线（CB）。把主存看作一个黑盒子，存储器地址寄存器（MAR）和存储器数据寄存器（MDR）是主存和CPU之间的接口。MAR可以接收由程序计数器（PC）的指令地址或来自运算器的操作数的地址，以确定要访问的单元。MDR是向主存写入数据或从主存读出数据的缓冲部件。MAR和MDR从功能上看属于主存，但通常放在CPU内。
Physically,a bus is a set of wires.The components of the computer are connected to the buses.To send information from one component to another,the source component outputs data onto the bus.The destination component then inputs this data from the bus.As the complexity of a computer system increases,it becomes more efficient(in terms of minimizing connections) at using buses rather than direct connections between every pair of devices.Buses use less space on a circuit board and require less power than a large number of direct connections.They also require few pins on the chip or chips that comprise the CPU.
When the cpu reads data or instruction from or writes data to memory,it must specify the address of the memory location it wishes to access.It outputs this address to the address bus;memory inputs this address from the address bus and use it to access the proper memory location.Each I/O devices,usch as a keyboard,monitor,or disk device,has a unique address as well,when accessing an I/O device,the cpu places address of the device on the address bus.Each bus can read the address off the bus and determine whether it is the device being access by the cpu.Unlike the other buses,the address bus always receives data form the cpu,the cpu never reads the address bus.
Data is transfered via the data bus.When the cpu fetches data from memory,it first outputs the memory address on its address bus.Then memory outputs the data onto the data bus,the cpu can then read the data from the data bus.When writing data to memory,the cpu first outputs the address onto the address bus,then outputs the data onto the data bus.The memory then reads and stores the data at proper location.The processes for reading data from and writing data to the I/O devices are similar.
The control bus is different from the other two buses.The address bus consists of a lines,which combine to transmit one -bit address value.Similarly,the lines of the data bus work together to transmit a single multi-bit value.In contrast,the control bus is a collection of individual control signals.These signals indicate whether data is to be read into or written out of the cpu,whether the cpu is accessing memory or an I/O devices or memory is ready to transfer data.The control bus is really a collection of (mostly) undirectional signals.Most of these signals are output from the memory and I/O subsystems,although a few are output by these subsystems to the cpu.
A system may have a hierarchy of buses.for example,it may use its address,data and control buses to access memory,and an I/O controller.The I/O controller,in turn,may access all I/O devices using a second bus,often called an I/O bus or a local bus.
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